Field programmable gate arrays (FPGAs), first introduced by Xilinx in 1985, are becoming increasingly popular devices for use in electronics systems. For example, communications systems employ FPGAs in large measure for their re-programmability. In general, the use of FPGAs continues to grow at a rapid rate because they permit relatively short design cycles, reduce costs through logic consolidation, and offer flexibility in their re-programmability.
The field of reconfigurable computing is advancing steadily, using FPGAs as the basis for high-performance reconfigurable systems. Run-Time Reconfigurable (RTR) systems distinguish themselves by performing circuit logic and routing customization at run-time. RTR systems using FPGAs are expected to result in systems that require less hardware, less software, and fewer input/output resources than traditional FPGA-based systems. However, scarcity of software that supports RTR is believed to be one reason that RTR has been outpaced by research in other areas of reconfigurable computing.
Current tools for developing an RTR application are perceived as requiring a great deal of knowledge relative to the architecture of the hardware device to which the RTR application is targeted. For example, one tool provides methods for manipulating a configuration bitstream for programming various resources of a programmable logic device. Forcing a designer to think of a design at too low a level complicates matters for the designer.
A system and method that address the aforementioned problems, as well as other related problems, are therefore desirable.